Computer architecture : (Record no. 52186)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01743nam a22002537a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IN-BdCUP |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240430111335.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 240430b ii ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9789351073659 |
| 040 ## - CATALOGING SOURCE | |
| Language of cataloging | eng |
| Transcribing agency | IN-BdCUP |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 004.22 |
| Item number | HEN |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hennessy, John L. |
| Relator term | Author |
| 245 ## - TITLE STATEMENT | |
| Title | Computer architecture : |
| Remainder of title | a quantitative approach/ |
| Statement of responsibility, etc. | by John L. Hennessy, and David A. Patterson |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 6th edition. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Cambridge : |
| Name of publisher, distributor, etc. | Morgan Kaufmann Publishers, |
| Date of publication, distribution, etc. | 2019. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxix, 617, A-55, B-67, C-78, R-36, I-48 p. ; |
| Dimensions | 24 cm. |
| Type of unit | PB |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Fundamentals of quantitative design and analysis<br/>Memory hierarchy design<br/>Instruction-level parallelism and its exploitation<br/>Data-level parallelism in vector, SIMD, and GPU architectures<br/>Thread-level parallelism<br/>Warehouse-scale computers to exploit request-level and data-level parallelism<br/>Domain-specific architectures<br/>Appendix A. Instruction set principles ; Appendix B. Review of memory hierarchy ; Appendix C. Pipelining : basic and intermediate concepts<br/>Online appendices. Appendix D. Storage systems ; Appendix E. Embedded systems ; Appendix F. Interconnection networks ; Appendix G. Vector processors in more depth ; Appendix H. Hardware and software for VLIW and EPIC ; Appendix I. Large-scale multiprocessors and scientific applications ; Appendix J. Computer arithmetic ; Appendix K. Survey of instruction set architectures ; Appendix L. Advanced concepts on address translation ; Appendix M. Historical perspectives and references<br/> |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Computer architecture |
| Topical term or geographic name entry element | Computers and IT |
| Topical term or geographic name entry element | Ordinateurs Architecture |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Patterson, David A. |
| Relator term | Author |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Book |
| Suppress in OPAC | No |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection | Home library | Current library | Date acquired | Source of acquisition | Order Number | Cost, normal purchase price | Bill number | Total checkouts | Full call number | Barcode | Date last seen | Actual Cost, replacement price | Bill Date | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Computer Science and Technology | Ranganathan Library | Ranganathan Library | 13/03/2024 | Today & Tomorrow Printers and publishers | 23-24/389 | 740.00 | TTPP/573/23-24 | 004.22 HEN | 050393 | 30/04/2024 | 925.00 | 08/03/2024 | Book |