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Chip design for submicron VLSI : CMOS layout and simulation / Uyemura, John P.
Material type:
TextLanguage: English Publication details: New Delhi : Cengage learning, 2006.Description: xvi, 411 p. ; 27 cmISBN: - 9788131501955
- 621.3815 UYE
| Item type | Current library | Call number | Status | Barcode | |
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Ranganathan Library | 621.3815 UYE (Browse shelf(Opens below)) | Available | 033425 |
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| 621.3815 RAS Microelectronic circuits analysis and design / | 621.3815 SAR Foundation of digital electronics and logic design / | 621.3815 TOK Theory and Problems of Digital Principles / | 621.3815 UYE Chip design for submicron VLSI : CMOS layout and simulation / | 621.38151 DUB Fundamentals of electrical drivers / | 621.38152 COM Glossary of semiconductor (Hindi) / | 621.38152 COM Glossary of semiconductor (Hindi) / |
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